Analog Mixed-Signal Verification Engineer

ppINVENTVM is actively looking for a talented AMS Verification Engineer to join the design team. /ppIn this role, you will be responsible for verifying mixed-signal and analog/mixed-signal (AMS) integrated circuits by developing robust verification environments, creating testbenches, and ensuring first-pass silicon success. You will work closely with analog and digital designers throughout the product development cycle. /ph3Key Responsibilities /h3ulliDevelop and execute verification plans for analog and mixed-signal IPs and SoCs /liliCreate, maintain, and enhance AMS verification environments using industry-standard methodologies /liliDevelop behavioral models of analog blocks using Verilog-A, Verilog-AMS, SystemVerilog RNM, or equivalent modeling languages /liliDesign testbenches, stimuli, checkers, assertions, and coverage metrics to validate mixed-signal functionality /liliPerform functional, corner, Monte Carlo, and regression simulations /liliCollaborate with analog and digital design teams to identify, debug, and resolve functional issues /liliSupport integration and verification of analog IPs within larger digital or mixed-signal SoCs /liliAnalyze simulation results and communicate findings through clear technical reports /liliContribute to verification methodology improvements, automation, and scripting /liliSupport silicon bring-up and correlation between simulation and laboratory measurements when required /li /ulh3Required Qualifications /h3ulliMaster's degree in Electrical Engineering, Electronics Engineering, or a related field /liliSolid understanding of analog and mixed-signal circuit fundamentals, including:ulli Operational amplifiers /lili Comparators /lili ADCs and DACs /lili PLLs (preferred) /lili Voltage regulators and references /lili Switched-capacitor circuits /li /ul /liliExperience with AMS simulation and verification tools (e.g., Cadence Virtuoso, Spectre, Xcelium) /liliKnowledge of Verilog-AMS, Verilog-A, SystemVerilog, or Real Number Modeling (RNM) /liliFamiliarity with scripting languages such as Python, Tcl, Perl, or Shell /liliStrong debugging and problem-solving skills /liliGood communication skills and ability to work effectively in cross-functional teams /li /ulh3Desirable Qualifications /h3ulliExperience with UVM-based verification environments. /liliKnowledge of digital verification methodologies. /liliFamiliarity with mixed-signal modeling techniques and abstraction levels. /liliExperience with low-power verification concepts. /liliUnderstanding of CMOS device operation and semiconductor fundamentals. /li /ulpAll INVENTVM positions offer a stake in the company equity that also entitles to receive dividends, competitive benefits, sustainable work logistics aimed at balancing personal life and project deadlines. /p /p #J-18808-Ljbffr