Senior Digital IC Designer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As a Digital IC Design Senior Engineer in Marvell’s Connectivity team, you will be part of a highly skilled group of engineers designing high-performance connectivity solutions for data centers, cloud, and optical applications. The team works on advanced DSP devices for 400G/800G/1.6T applications, electro-optical gearboxes, and next-generation SerDes technologies.

Marvell is a global leader in data infrastructure: our Connectivity products power the networks of the world’s leading hyperscalers and telecommunications operators. You will join a collaborative and international environment, with the opportunity to see your designs go from RTL all the way through to mass production..

What You Can Expect

In this role you will take full ownership of assigned tasks, working with general supervision on routine projects and more detailed guidance on new assignments. Responsibilities include:

• Development and verification of RTL blocks for high-speed connectivity devices (DSP, FEC, SerDes, gearbox)
• Execution of circuit analysis and functional simulations on assigned design blocks, evaluating performance, area, and power (PPA)
• Application of Marvell design methodologies (Marvell ONE Flow / M1DP) for synthesis, STA, and DFT
• Debugging and resolution of moderately complex technical issues, exercising independent judgment in identifying solutions
• Collaboration with Physical Design, Verification, and Product Engineering teams to ensure tapeout quality
• Active participation in design reviews and weekly project meetings
• Documentation of technical results and knowledge sharing within the team
• Support and mentoring of junior engineers (T1) on project tasks and design methodologies

What We’re Looking For

To be successful in this role you must:

Education

• Master’s degree (or equivalent) in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field
• or Bachelor’s degree with at least 1–3 years of relevant professional experience

Technical Skills

• Knowledge and hands-on experience in digital RTL design (SystemVerilog / Verilog / VHDL)
• Experience with EDA tools for synthesis, STA, and simulation (e.g., Synopsys, Cadence)
• Familiarity with functional verification methodologies and DFT (Design for Test)
• Ability to work in a Linux environment and use scripting languages (Python, Perl, Tcl)
• Solid understanding of digital circuit fundamentals, sequential and combinational logic

Nice To Have

• Experience with high-speed design (SerDes, DSP, FEC, PAM4/Coherent)
• Knowledge of advanced CMOS process nodes (5nm / 3nm / 2nm)
• Experience with end-to-end tapeout flows

Soft Skills

• Ability to work effectively in international and multidisciplinary teams
• Strong communication skills in English (written and spoken)
• Quality-oriented mindset with a focus on on-time delivery
• Proactive approach to learning and knowledge sharing

Expected Base Pay Range

36,000 - 48,000, EUR per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation And Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.